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DIGIC 8 Register Map:

UART

Controls physical UART connection.

Address	Description
`0xD01202F0`	UART1_RX_SELECT_CONFIG
`0xD01202F4`	UART1_TX_SELECT_CONFIG
`0xD01302F0`	UART1_RX_SELECT_MASK
`0xD01302F4`	UART1_TX_SELECT_MASK

UART is connected to physical ICU UART on external debug connector. Handled by uart_change command on drysh.

0x0 selects ICU (DryOS on ARM core), 0x2 for CCLIME (DryOS on Xtensa core, network).

Display

Address	Description
`0xD030422C`	??
`0xD0304230`	VRAM pointer
`0xD0304234`	VRAM pitch
`0xD0304238`	Resolution
`0xD030423C`	??

LV peaking (Highlights / zebra)

Address	Output	Type	Controls what?
`0xD0300520`	HDMI	zebra	enable / disable
`0xD0300750`	HDMI	overexpo	threshold and style
`0xD0300754`	HDMI	overexpo	color
`0xD0300758`	HDMI	underexpo	threshold and style
`0xD030075C`	HDMI	underexpo	color
`0xD0304220`	LCD/EVF	zebra	enable / disable
`0xD0304488`	LCD/EVF	overexpo	threshold and style
`0xD030448C`	LCD/EVF	overexpo	color
`0xD0304490`	LCD/EVF	underexpo	threshold and style
`0xD0304494`	LCD/EVF	underexpo	color

Registers used by DispVram State object to control overexposure highlighting feature.

Different addresses and slightly different values than Digic 6/7, but capabilities are very similar.

It is possible to have independent zebras configured on LCD and HDMI while running in Clean HDMI mode!

Note on directly writing the registers

Directly writing some registers doesn't work (values are overridden). On R170.739 that happens for HDMI enable register, but this seems to differ from model to model. See DIGIC 6 Register Map: for more info.

TL;DR is that you need to find (via xrefs / static code analysis) where reg value is stored, and update that memory address instead.

Enable register

reg & 0x100 controls if highlight is enabled or not.

Value written should be masked 0x100 with one read from reg + 0x2000

This register lies in Display registers range and most likely has more meanings.

Threshold / style register

**** **** **** **** **** **** **** ****
*... .... .... .... .... .... .... .... visibility (on/off)
..** .... .... .... .... .... .... .... stripes move speed (0-3)
.... ...* .... .... .... .... .... .... stripes angle (45 / -45 deg)
.... .... ..** .... .... .... .... .... stripes style
.... .... .... .*** .... .... .... .... stripes opacity
.... .... .... .... **** **** .... .... threshold (underexpo)
.... .... .... .... .... .... **** **** threshold (overexpo)

Value written should be masked 0xB137FFFF with one read from reg + 0x2000

Field	Range	Description
visibility	0,1	zebra visibility (do not confuse with Enable register)
speed	0-3	lines/dots are moving slower → faster
angle	0-1	0: 45 deg, 1: -45 deg
style	0-2	0: light dots, 1: thin lines, 2: thick lines
opacity	0-7	very opaque → solid color
underexpo_th	0-255	Threshold on undexexpo register, ignored on overexpo
overexpo_th	0-255	Threshold on overexpo register, ignored on underexpo

Note: On HDMI max threshold is 0xE8 Values above that are not displayed!

Color register

Controls color of highlight overlays. ??YYUUVV format. Canon code defaults to black (00008080)

More registers

Code suggests there are more registers:

Output	Reg	Addresses	Range
HDMI	Enable	`0xD0300520 + 0x30 * n`	n∈⟨0,7⟩
LCD	Enable	`0xD0304220 + 0x30 * n`	n∈⟨0,7⟩
HDMI	Threshold	`0xD0300750 + 0x8 * m`	m∈⟨0,5⟩
HDMI	Color	`0xD0300754 + 0x8 * m`	m∈⟨0,5⟩
LCD	Threshold	`0xD0304488 + 0x8 * m`	m∈⟨0,5⟩
LCD	Color	`0xD030448C + 0x8 * m`	m∈⟨0,5⟩

n values above 0 and m values above 1 are not understood. There's no visible difference on screen.

For m > 1 Threshold registers accept both under and overexposure thresholds at the same time, but since those have no visible effects on displayed image - meaning is unknown.

Guess: maybe m > 1 are in use for 10 bit / HDR mode?

Audio

Address	Description
`0xD800021D`	Left Microphone Level and Peak
`0xD8000220`	Right Microphone Level and Peak

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