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Digic 6 and 7 allow to define up to 8 hardware display layers. Each of layers has independent source, resolution, visible area and even can support multiple variants of YUV and also Indexed RGB buffers. Layers can also do some hardware effects like over/under exposure highlights (known as zebras) and probably more.

Depending on generation and model, Canon code will overwrite some (but not all) of the register values based on data structures stored in RAM. This applies also to layers code doesn't use.

Output has to be active when MMIO is being written, otherwise changes will be ignored.

There should be 3rd set of registers used for analog output similar to ones below.

Each address consists of 8 sets (layers), each consisting of eight 32 bit values representing each hardware layer. MMIO order starts from bottom layer (0) to topmost (7) in Z axis.

Wildly enough, MMIO doesn't take source buffer address, but rather a number associated to VRAM, which is registered via different MMIO. See Vram registration.

Vram index register seems to also take two 16 bit values instead of one, possibly for layers that use separate image and alpha buffers (eg UYVY+AA, unconfirmed).

• Vram resolution is the resolution of entire buffer, in pixels.
• Input offsets will “crop” source image by skipping everything up to X,Y (eg. to cut black borders)
• Output offsets will move rendered image on screen by X,Y pixels.

So far we observed following flags by doing some empirical tests:

#define HWLAYER_ENABLE           0x1
#define HWLAYER_ALWAYS_SET     0x300 // At least on indexed, black (index 0?) becomes transparent with this not set
#define HWLAYER_FLIP_H        0x2000
#define HWLAYER_FLIP_V        0x4000
#define HWLAYER_DOUBLE_H     0x20000
#define HWLAYER_DOUBLE_V     0x40000
#define HWLAYER_ZEBRAS    0x10000000

// Going through lowest byte (except LSB which is ENABLE bit)
// reveals multiple combinations that work for some YUV and indexed formats.
#define HWLAYER_TYPE_OSD     0x40
#define HWLAYER_TYPE_LV      0x04
#define HWLAYER_TYPE_INDEXED 0x48

// No idea, Canon uses HWLAYER_UNK on LCD, HWLAYER_ZEBRAS on HDMI
// Seems to have no effect at leat on indexed RGB
#define HWLAYER_UNK       0x40000000

Combining those flags is required to get desired effects. For example, `0x10000341` is YUV/no transparency buffer and zebras enabled on that layer. `0x660349` will result in indexed RGB source, upscaled 2x and mirrored in both axes.

Please note than for unknown reasons HWLAYER_DOUBLE_V doesn't seem to work on HDMI unless scaling flag (+0x14) is set to 1.

Canon code will also forcefully overwrite some of the flags (zebras, upscaling register) from RAM data structures so values may need to be updated there instead of MMIO directly.

In default configuration, bootloader uses Indexed RGB on layer 0 to draw things on screen. EOS codebase seems to use layer 0 to display active preview (LV, photo) image and layer 5 for GUI (referred as internally as OSD). Other layers are inactive.

The notes below are from 80D, but 77D (DIGIC 7) has the same setup:

Before VRAM can be used by a hardware layer, it has to be registered and assigned an ID.

MMIO structure is as below:

MMIO as to be written in order, be aware of any compiler optimizations (best to set data structures as volatile).

Example code:

#define MMIO_D6_REGISTER_VRAM            0xD2030100
 
typedef struct mmio_d6_register_vram{
    volatile uint32_t index;
    volatile uint32_t pitch;
    volatile uint32_t ptr;
} mmio_d6_register_vram;
 
static void D6_register_VRAM(uint32_t buffer_index, uint32_t width, uint8_t* bmp_vram_indexed)
{
    mmio_d6_register_vram * vram_reg = (mmio_d6_register_vram*)MMIO_D6_REGISTER_VRAM;
 
    uint32_t old_int = cli();
    vram_reg->index = buffer_index;
    vram_reg->pitch = ((((width) << 0x10) >> 0x14) - 1) | 0x20000;
    vram_reg->ptr = (uint32_t)bmp_vram_indexed >> 8;
    sei(old_int);
}

This works differently than Digic 5 and below. There's a MMIO structure (per output), which takes a pointer to palette of 256 uint32_t entries stored in RAM.

MMIO structure is as below:

Please note that fields has to be written in order: flag, pointer, apply.

Example code:

typedef struct mmio_d6_palette{
    volatile uint32_t apply;
    volatile uint32_t flag;
    volatile uint32_t ptr;
} mmio_d6_palette;
 
static void D6_set_hw_palette(mmio_d6_palette* base_addr, uint32_t* palette)
{
    uint32_t old_int = cli();
    base_addr->flag = 0xff;
    base_addr->ptr = (uint32_t)palette >> 4;
    base_addr->apply = 1;
    sei(old_int);
}

The table below documents registers used to configure underexposure / overexposure Zebra effects. Both can be enabled at the same time, settings for each output are separate. This means when camera outputs to multiple screens at the same time, each can have a different effect configuration.

There's likely 3rd set of registers for Video output.

Please note that to enable Zebras on layer/output you need to set a proper layer flag as described in Hardware compositor section.

Code suggests that they may be more hardware effects controlled by addresses just after those listed below.

Registers used by DispVram State object to control overexposure highlighting feature.

**** **** **** **** **** **** **** ****
*... .... .... .... .... .... .... .... visibility (on/off)
.... .... *... .... .... .... .... .... stripes angle (45 / -45 deg)
.... .... .*.. .... .... .... .... .... stripes move speed (0-1)
.... .... ..** .... .... .... .... .... stripes style
.... .... .... .*** .... .... .... .... stripes opacity
.... .... .... .... **** **** .... .... threshold (underexpo)
.... .... .... .... .... .... **** **** threshold (overexpo)

Controls color of highlight overlays. ??YYUUVV format. Canon code defaults to black (00008080)