This is an old revision of the document!
Table of Contents
DIGIC 8 Register Map:
UART
Controls physical UART connections.
| Address | Description |
|---|---|
0xD01202F0 | UART1_RX_SELECT_CONFIG |
0xD01202F4 | UART1_TX_SELECT_CONFIG |
0xD01302F0 | UART1_RX_SELECT_MASK |
0xD01302F4 | UART1_TX_SELECT_MASK |
UART2 is unknown.
UART1 is connected to physical ICU UART on external debug connector. Handled by uart_change command on drysh.
0x0 selects ICU (DryOS on ARM core), 0x2 for CCLIME (DryOS on Xtensa core, network).
Display
| Address | Description |
|---|---|
0xD030422C | ?? |
0xD0304230 | VRAM pointer |
0xD0304234 | VRAM pitch |
0xD0304238 | Resolution |
0xD030423C | ?? |
LV peaking (Highlights / zebra)
| Address | Description |
|---|---|
0xD0304220 | LCD/EVF highlight enable register |
0xD0304488 | LCD/EVF highlight threshold register |
0xD030448C | LCD/EVF highlight color register |
0xD0300520 | HDMI highlight enable register |
0xD0300750 | HDMI highlight threshold register |
0xD0300754 | HDMI highlight color register |
Registers used by DispVram State object to control overexposure highlighting feature.
Not tested on HDMI yet (registers found via static analysis). Ability to have underexposure highlights (like on D45) is not yet confirmed.
Enable register
reg & 0x100 controls if highlight is enabled or not. Value written should be masked with one read from reg + 0x2000
Threshold register
AABBCCDD, where:
- AA:
0x80enables visibility - BB: range
0x0 - 0x7controls pattern (from light dots to solid color) - CC: unknown?
0x0on R - DD: Highlights threshold
Color register
Controls color of highlight overlays. ??YYUUVV format. Canon code defaults to black (00008080)
Audio
| Address | Description |
|---|---|
0xD800021D | Left Microphone Level and Peak |
0xD8000220 | Right Microphone Level and Peak |