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digic8 [2022/01/22 02:03] coondigic8 [2022/01/22 12:26] – [Display] kitor
Line 1: Line 1:
 ====== DIGIC 8 ====== ====== DIGIC 8 ======
  
-Register Map:+===== Register Map: =====
  
-^ Address     ^ Description                     ^ +==== UART ====
-| 0xD800021D  | Left Microphone Level and Peak  | +
-| 0xD8000220  | Right Microphone Level and Peak |+
  
 +Controls physical UART connections.
  
-Interrupt Vector Table:+^ Address        ^ Description     ^ 
 +| ''0xD01202F0'' | UART1_RX_SELECT | 
 +| ''0xD01202F4'' | UART1_TX_SELECT | 
 +| ''0xD01302F0'' | UART2_RX_SELECT | 
 +| ''0xD01302F4'' | UART2_TX_SELECT |
  
-^ Vector ^ Description                           ^+ 
 +''UART2'' is unknown. 
 + 
 +''UART1'' is connected to physical ICU UART on external debug connector. Handled by ''uart_change'' command on drysh. 
 + 
 +''0x0'' selects ICU (DryOS on ARM core), ''0x2'' for CCLIME (DryOS on Xtensa core, network). 
 + 
 +==== Display ==== 
 + 
 +^ Address        ^ Description   ^ 
 +| ''0xD030422C'' | ??            | 
 +| ''0xD0304230'' | VRAM pointer 
 +| ''0xD0304234'' | VRAM pitch    | 
 +| ''0xD0304238'' | Resolution    | 
 +| ''0xD030423C'' | ??            | 
 +==== LV peaking, etc ==== 
 + 
 +^ Address        ^ Description               ^ 
 +| ''0xD0304488'' | LCD/EVF control register 
 +| ''0xD030448C'' | LCD/EFV related register 
 +| ''0xD0300750'' | HDMI control register     | 
 +| ''0xD0300754'' | HDMI related register     | 
 + 
 +Registers used by ''DispVram'' State object to control overexposure highlighting feature. 
 + 
 +Control register sets highlight params like threshold, color, style. 
 + 
 +Related register meaning is unknown at the moment, but it is also written on enable/disable by ''DispVram'' 
 + 
 +At this moment we don't know how to enable highlights by just writing the registers. But while those are displayed - writing random number to control register changes both style and threshold of highlights. 
 + 
 +==== Audio ==== 
 + 
 +^ Address         ^ Description                     ^ 
 +| ''0xD800021D '' | Left Microphone Level and Peak  | 
 +| ''0xD8000220 '' | Right Microphone Level and Peak | 
 + 
 + 
 +===== Interrupt Vector Table: ===== 
 + 
 +^ Vector ^ Description ^
 | 0x000  | -noise-                               | | 0x000  | -noise-                               |
 | 0x001  | EDOMAIN_OPERA_OPEKICK0                | | 0x001  | EDOMAIN_OPERA_OPEKICK0                |
Line 523: Line 566:
 | 0x1FE  | INTC_ANDINT(4)*ASYMMETRIC             | | 0x1FE  | INTC_ANDINT(4)*ASYMMETRIC             |
 | 0x1FF  | INTC_ANDINT(5)*ASYMMETRIC             | | 0x1FF  | INTC_ANDINT(5)*ASYMMETRIC             |
 +
 +==== Interrupt Vector Table for GIC (Generic Interrupt Controller): ====
 +
 +^ Vector ^ Description ^
 +| 0x200 | GIC_SGI(0)        |
 +| 0x201 | GIC_SGI(1)        |
 +| 0x202 | GIC_SGI(2)        |
 +| 0x203 | GIC_SGI(3)        |
 +| 0x204 | GIC_SGI(4)        |
 +| 0x205 | GIC_SGI(5)        |
 +| 0x206 | GIC_SGI(6)        |
 +| 0x207 | GIC_SGI(7)        |
 +| 0x208 | GIC_SGI(8)        |
 +| 0x209 | GIC_SGI(9)        |
 +| 0x20a | GIC_scheduling    |
 +| 0x20b | GIC_timer         |
 +| 0x20c | GIC_suspend       |
 +| 0x20d | GIC_SGI(13)       |
 +| 0x20e | GIC_SGI(14)       |
 +| 0x20f | GIC_SGI(15)       |
 +| 0x210 | GIC_PPI(16)       |
 +| 0x211 | GIC_PPI(17)       |
 +| 0x212 | GIC_PPI(18)       |
 +| 0x213 | GIC_PPI(19)       |
 +| 0x214 | GIC_PPI(20)       |
 +| 0x215 | GIC_PPI(21)       |
 +| 0x216 | GIC_PPI(22)       |
 +| 0x217 | GIC_PPI(23)       |
 +| 0x218 | GIC_PPI(24)       |
 +| 0x219 | GIC_PPI(25)       |
 +| 0x21a | GIC_PPI(26)       |
 +| 0x21b | GIC_GlobalTimer   |
 +| 0x21c | GIC_LegacyFiq     |
 +| 0x21d | GIC_PrivateTimer  |
 +| 0x21e | GIC_WatchdogTimer |
 +| 0x21f | GIC_LegacyIrq     |
 +| 0x220 | GIC_MariusIntc    |
 +| 0x221 | GIC_OmarIntc      |
 +| 0x222 | GIC_SPI(34)       |
 +| 0x223 | GIC_SPI(35)       |
 +| 0x224 | GIC_SPI(36)       |
 +| 0x225 | GIC_SPI(37)       |
 +| 0x226 | GIC_SPI(38)       |
 +| 0x227 | GIC_SPI(39)       |
 +| 0x228 | GIC_SPI(40)       |
 +| 0x229 | GIC_SPI(41)       |
 +| 0x22a | GIC_SPI(42)       |
 +| 0x22b | GIC_SPI(43)       |
 +| 0x22c | GIC_SPI(44)       |
 +| 0x22d | GIC_SPI(45)       |
 +| 0x22e | GIC_SPI(46)       |
 +| 0x22f | GIC_SPI(47)       |
 +| 0x230 | GIC_SPI(48)       |
 +| 0x231 | GIC_SPI(49)       |
 +| 0x232 | GIC_SPI(50)       |
 +| 0x233 | GIC_SPI(51)       |
 +| 0x234 | GIC_SPI(52)       |
 +| 0x235 | GIC_SPI(53)       |
 +| 0x236 | GIC_SPI(54)       |
 +| 0x237 | GIC_SPI(55)       |
 +| 0x238 | GIC_SPI(56)       |
 +| 0x239 | GIC_SPI(57)       |
 +| 0x23a | GIC_SPI(58)       |
 +| 0x23b | GIC_SPI(59)       |
 +| 0x23c | GIC_SPI(60)       |
 +| 0x23d | GIC_SPI(61)       |
 +| 0x23e | GIC_SPI(62)       |
 +| 0x23f | GIC_SPI(63)       |
digic8.txt · Last modified: 2022/01/22 15:49 by coon